PROJECT TITLE :
Enhanced locking range technique for divide-by-3 differential injection-locked frequency divider
A new circuit technique is proposed to reinforce the locking range of divide-by-three injection-locked frequency dividers (ILFDs) implemented using a customary zero.eighteen μm CMOS method. The ILFD uses a transformer feedback to extend the second harmonic and enhances the conversion efficiency of injection metal-oxide semiconductor field-impact transistor mixers. The ILFD core consumes ten.8 mW power at the supply voltage of zero.9 V and with a circuit core current of twelve mA. At the incident power of 0 dBm, the measured locking range is four.2 GHz (thirty seven.seventeenp.c), from the incident frequency nine.a pair of-thirteen.4 GHz.
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