PROJECT TITLE :
Threshold voltage asymmetric degradation on octagonal MOSFET during HCI stress
To enhance analogue circuit reliability, the evolution of VT and VT matching underneath hot carrier injection (HCI) stress has been investigated on normal and octagonal MOSFETs. An vital degradation will be observed on normal devices thanks to the presence of parasitic corner transistors. The specific structure of octagonal MOSFETs removes parasitic transistors and reduces VT degradation. Moreover, the residual VT degradation of octagonal MOSFETs, which is uneven, is further reduced by reversing source and drain connections.
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