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Design and characterisation of ultra-low-power SOI-CMOS IC temperature level detector

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PROJECT TITLE :

Design and characterisation of ultra-low-power SOI-CMOS IC temperature level detector

ABSTRACT :

Described are the design and characterisation of an ultra-low-power temperature level detector (TLD) and temperature sensor based on a silicon-on-insulator (SOI) CMOS integrated circuit (IC) for harsh setting applications. Since this IC is especially for harsh surroundings applications (e.g. high temperatures and radiations), it's been designed and manufactured using the one mm high-temperature SOI-CMOS technology provided by X-FAB. The measured power dissipation of the TLD circuit is nine μW at a supply voltage of five V and temperature of 27 °C, according to the measurement results of the manufactured style.


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Design and characterisation of ultra-low-power SOI-CMOS IC temperature level detector - 4.7 out of 5 based on 68 votes

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