PROJECT TITLE :
+134 dBm IIP3, 0.4-1 GHz common-drain stage with its high frequency analysis
A highly linear common-drain (CD) configuration is intended and measured. The third-order nonlinearity of the transconductance that may be a major contributor to the third-order nonlinearity within the CD configuration, is linearised by applying the multiple gated transistor technique. Yet, the harmonic feedback result in the configuration, which limits linearity improvement, is solved by using an LC resonator as a load impedance. The solution is urged by the high frequency analysis using the Volterra series. This circuit is implemented with a zero.13 μm CMOS method. Measurement results show a NF of 4.2 dB, an IIP3 of 34 dBm, and a gain of -four.three dB at 7.2 mW of power consumption.
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