PROJECT TITLE :
D-band divide-by-3 injection-locked frequency divider in 65 nm CMOS
A D-band divide-by-three injection-locked frequency divider (ILFD) is realised in sixty five nm CMOS process. The ILFD adopts the twin-injection and current-reused techniques. It achieves the input locking range of 12two.4-125.four GHz and its power consumption is 9.one mW for a provide of one.three V excluding buffers and also the biasing circuit.
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