Scaling of Vertical InAs–GaSb Nanowire Tunneling Field-Effect Transistors on Si


We have a tendency to demonstrate improved performance thanks to enhanced electrostatic control achieved by diameter scaling and gate placement in vertical InAs-GaSb tunneling field-effect transistors integrated on Si substrates. The simplest subthreshold swing, 68 mV/decade at $V_textrm DS= 0.3$ V, was achieved for a tool with twenty-nm InAs diameter. The on-current for the identical device was thirty five $mu textA/mu textm$ at $V_textrm GS=zero.five$ V and $V_textrm DS= 0.5$ V. The fabrication technique used allow downscaling of the InAs diameter down to eleven nm with a flexible gate placement.

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