Design of a 700 V DB-nLDMOS Based on Substrate Termination Technology


A 700 V twin-buried-layer n-channel lateral double-diffused MOSFET (DB-nLDMOS) based mostly on substrate termination technology (STT) is presented and experimentally demonstrated in this paper. The termination region is well analyzed and designed to avoid the premature avalanche breakdown caused by the curved junction. The 2-D and three-D numerical simulations are performed to optimize the three key parameters of and that impact on breakdown voltage (BV) greatly in the termination region. The simulation results show that the electrical field peak is reduced and premature avalanche breakdown is avoided at the curved abrupt p-well/n-well junction with the STT. The experimental results demonstrate that low of a hundred and five.6 based mostly on and high BV of 78eight V are achieved by the DB-nLDMOS.

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