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Controlling the Drain Side Tunneling Width to Reduce Ambipolar Current in Tunnel FETs Using Heterodielectric BOX

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PROJECT TITLE :

Controlling the Drain Side Tunneling Width to Reduce Ambipolar Current in Tunnel FETs Using Heterodielectric BOX

ABSTRACT:

In this temporary, we demonstrate using two-D simulations that the use of a heterodielectric BOX (HDB) on top of a highly doped ground plane will control the tunneling width at the channel-drain interface and result in a important reduction within the ambipolar current in tunnel FETs (TFETs). The HDB consists of SiO2 underneath the supply and also the channel regions, and HfO2 under the drain region. When the thickness of the HDB is 25 nm and the bottom plane is heavily doped, we show that the drain region at the channel-drain interface is effectively depleted. As a result, the tunneling width at the channel-drain interface increases leading to an entire suppression of ambipolar conduction in a very TFET even when the gate voltage VGS = -0.8 V.


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Controlling the Drain Side Tunneling Width to Reduce Ambipolar Current in Tunnel FETs Using Heterodielectric BOX - 4.8 out of 5 based on 72 votes

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