PROJECT TITLE :
Charge Trapping Memory Characteristics of Amorphous-Indium–Gallium–Zinc Oxide Thin-Film Transistors With Defect-Engineered Alumina Dielectric
A nonvolatile memory (NVM) primarily based on an amorphous-indium–gallium–zinc oxide (a-IGZO) skinny-film transistor (TFT) with defect-designed gate insulator was demonstrated. The gate insulator was a blocking alumina/storage alumina/tunneling alumina stack structure, that was simply assembled in a single atomic layer deposition step. The memory device showed a positive shift of threshold voltage as massive as 14.four V when +20 V, one s programming. In distinction, the memory erasing was not sensitive to negative gate voltage in the dark. Once programmed, the memory can solely be light-weight erased. Furthermore, the light combined with a negative bias improved the erasing speed effectively. Further, a ten-year memory window as massive as seven.five V was extrapolated at area temperature with a charge loss of 34.seven%. Based on the observation of blisters in the storage alumina layer after high temperature annealing, Fourier rework infrared spectroscopy measurement and initial-principles calculations, the high electron storage capacity can be attributed to the deep defect levels within the storage alumina layer, that were originated from hydrogen impurity. This a-IGZO TFT charge trapping NVM with high performance and easy process could be a candidate device for the applying of totally useful transparent system on panel.
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