PROJECT TITLE :

Improving ESD Robustness of pMOS Device With Embedded SCR in 28-nm High- $k$ /Metal Gate CMOS Process

ABSTRACT:

A pMOS device with an embedded silicon-controlled rectifier to boost its electrostatic discharge (ESD) robustness has been proposed and implemented during a twenty eight-nm high- $k$ /metal gate CMOS method. An extra p-kind ESD implantation layer was added into the pMOS to understand the proposed device. The experimental results show that the proposed device has the advantages of high ESD robustness, low holding voltage, low parasitic capacitance, and sensible latchup immunity. With higher performances, the proposed device was more suitable for ESD protection in a very sub-fifty-nm CMOS process.


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