PROJECT TITLE :
Scaling of High-Aspect-Ratio Current Limiters for the Individual Ballasting of Large Arrays of Field Emitters
We report the fabrication and characterization of high-side-ratio silicon pillar current limiters [vertical ungated field-impact transistors (FETs)] for ballasting individual field emitters within field-emitter arrays (FEAs). Dense (1-$muhboxm$ pitch) FEAs that are individually ballasted by one hundred-nm-diameter and 10-$muhboxm$-tall current limiters were fabricated, ensuing in an emitter tip radius under ten nm. When characterised while not field emitters, the vertical current limiters (ungated FETs) show current-source-like behavior, with saturation currents up to 15 pA/FET. When the current limiters are incorporated into massive arrays of field emitters, the current–voltage characteristics of the FEA show evidence of current limitation at high extraction gate voltages. Emission current densities of over 200 $muhboxA/cm^2$ were obtained from 1.36 million emitter arrays with 5-$muhboxm$ pitch.
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