Considerations for Ultimate CMOS Scaling


This review paper explores concerns for final CMOS transistor scaling. Transistor architectures such as extraordinarily thin silicon-on-insulator and FinFET (and related architectures like TriGate, Omega-FET, Pi-Gate), and nanowire device architectures, are compared and contrasted. Key technology challenges (like advanced gate stacks, mobility, resistance, and capacitance) shared by all of the architectures will be discussed in relation to recent research results.

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