PROJECT TITLE :
A Dual-Exposure Single-Capture Wide Dynamic Range CMOS Image Sensor With Columnwise Highly/Lowly Illuminated Pixel Detection
This paper proposes a twin-exposure single-capture wide dynamic-vary (DR) CMOS image sensor (CIS) for optical identification systems. The proposed sensor achieves columnwise highly/lowly illuminated pixel detection, and only the “adequate” voltage signal (long- or short-exposure signal) is digitized. With an integrated highly/lowly illuminated pixel detection perform within the columnwise single-slope (SS) ADC, every pixel is browse out solely once with highly or lowly illuminated pixel index for synthesis of a wide DR frame. This approach can dramatically scale back power dissipation compared to existing multiframe-readout solutions. The DR growth ratio is programmable and depends on the time ratio of long- to short-exposure periods. A one hundred sixty $times$ 140 wide DR CIS chip with the proposed SS ADC was fabricated using zero.eighteen- $muhboxm$ CIS technology. This chip achieves a sensitivity of 5.thirty three $hboxV/lxcdothboxs$ and a noise floor of 0.twenty nine% of full swing $(hbox73e^-)$ at 60 fps. The measured DR is ninety one dB with a forty-dB boost by setting the exposure time ratio as 100. The ensuing DNL is $+hbox0.16/-hbox0.24$ LSB, and also the column-fastened-pattern noise is concerning 0.16p.c.
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