PROJECT TITLE :
Reduction of Charge Trapping in Film on Ge Substrates by Atomic Layer Deposition of Various Passivating Interfacial Layers
The dielectric performance and charge trapping properties of $ hboxHfO_2$ on a Ge substrate with various passivating interfacial layers (PILs), like $hboxSiO_xhboxN_y$, $hboxAlO_xhboxN_y$, $hboxHfO_xhboxN_y$, and $hboxLaO_xhboxN_y$, are investigated. The large capacitance–voltage ($C$– $V$) hysteresis of $ hboxHfO_2$ on a Ge substrate ($sim$1500 mV) wasn't improved by inserting either $hboxHfO_xhboxN_y$ or $hboxLaO_xhboxN_y$ PIL between the $hboxHfO_2$ and Ge substrates, while each $hboxSiO_xhboxN_y$ and $hboxAlO_xhboxN_y$ PILs induced an evident reduction of $C$–$V$ hysteresis. Because the PILs' thicknesses increased, the $C$– $V$ hysteresis of $ hboxHfO_2$ with $hboxSiO_xhboxN_y$ PIL decreased to nearly zero, whereas that of $hboxHfO_2$ with $hboxAlO_xhboxN_y$ PIL decreased however was saturated at approximately 400 mV. Furthermore, the charge trapping property of $ hboxHfO_2$ with $hboxSiO_xhboxN_y$ PIL on a Ge substrate is appreciate that of $hboxHfO_2$ grown on a Si substrate. Negligible $C$– $V$ hysteresis and negligible charge trapping of $hboxHfO_2$ with $ hboxSiO_xhboxN_y$ PIL were understood from the fact that $hboxSiO_xhboxN_y$ is a lot of resistant to react with a Ge substrate and defective Ge suboxides are efficiently suppressed during the formation of $hboxSiO_x hboxN_y$ PIL and $hboxHfO_2$ layers.
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