Insight Into N/PBTI Mechanisms in Sub-1-nm-EOT Devices


New insights into the negative/positive bias temperature instability (N/PBTI) degradation mechanisms in the sub-1-nm equivalent oxide thickness (EOT) regime are presented in this paper. The electrical field necessities instructed by the International Roadmap for Semiconductors demand a good higher worth within the sub-1-nm-EOT regime, which is practically troublesome to meet with the increased hole trapping mechanism involved. Thus, a fastened electric field target of five MV/cm is taken into account likewise here, which would possibly be a affordable target to achieve. The sub-1-nm-EOT devices in this paper are obtained by adopting a thinner TiN metal gate inducing Si in-diffusion and reducing the interfacial oxide layer thickness. NBTI degradation follows an isoelectric field model in over an EOT of one nm due to the degradation mechanism of $hboxSi/SiO_2$ interface state generation combined with a hole trapping mechanism. However, in the sub-one-nm-EOT regime, the chance of hole trapping into the gate dielectric increases, and it's strongly enthusiastic about the thickness of the interfacial oxide layer. Several experimental proofs of this increased bulk defect impact are shown in this paper. Additionally, the bulk defect affecting NBTI is shown to be principally a preexisting defect, though the permanently generated defects are comparatively higher in sub-1-nm-EOT devices. Thus, NBTI in the sub-1-nm-EOT regime faces the lifetime limit by each electric field dependence and increased degradation by increased hole trapping into bulk defects. Any, we tend to found a minimum interfacial layer thickness of 0.four nm that is needed to forestall the accelerated NBTI degradation by increased direct tunneling. The most degradation mechanism of PBTI in sub-one-nm EOT is that the electron trapping into bulk defects, which is the identical as in over one-nm-EOT devices. This enables us to modulate the bulk defect energetic locations within the oxide and to boost - BTI.

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