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Implementation of an a-Si:H TFT Gate Driver Using a Five-Transistor Integrated Approach

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PROJECT TITLE :

Implementation of an a-Si:H TFT Gate Driver Using a Five-Transistor Integrated Approach

ABSTRACT :

An integrated five-transistor/one-capacitor approach for realizing a a-Si:H skinny-film transistor (TFT) gate driver operating in multiphase-clock mode is proposed and investigated. The driver desires solely one giant-size TFT and one little-size storage capacitor. The performance and perform of the proposed driver are verified experimentally. The dependence of the performance on the device size is studied thoroughly. Stability of the fabricated drivers is tested employing a versatile measurement theme. Measured results show that the fabricated gate driver can work stably although the low-level-holding TFTs have a threshold-voltage shift of nineteen V.


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Implementation of an a-Si:H TFT Gate Driver Using a Five-Transistor Integrated Approach - 4.8 out of 5 based on 25 votes

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