A Junctionless Nanowire Transistor With a Dual-Material Gate


A dual-material-gate junctionless nanowire transistor (DMG-JNT) is proposed during this paper. Its characteristic is demonstrated and compared with a generic single-material-gate JNT using 3D numerical simulations. The results show that the DMG-JNT includes a range of fascinating options, like high on -state current, a massive on/off current ratio, improved transconductance $G_m$, high unity-gain frequency $f_T$, high most oscillation frequency $f_rm MAX$ , and reduced drain-induced barrier lowering. The effects of different control gate ratios $rm Ra$ and varied work-perform differences between the two gates are studied. Finally, the optimization of $rm Ra$ and also the work-function distinction for the proposed DMG-JNT is presented.

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