PROJECT TITLE :
Investigation of Abnormal $V_/V_$ Shifts Under Operating Conditions in Flash Memory Cells With $ hbox_hbox_$ High-$kappa$ Gate Stacks
$hboxAl_2hboxO_3$ high- $kappa$ stack could be a robust candidate as the dielectric layer in Flash memory cells for technology generations beyond sub-twenty nm. During this paper, the reason for abnormal $V_rm TH/V_rm FB$ shift at low operating electrical fields is investigated, i.e., $V_rm TH/V_rm FB$ reduces at low positive gate biases and will increase at low negative gate biases. It is found that this instability does not originate from the electrons trapping/detrapping from the gate nor from the dielectric relaxation. For the first time, intensive experimental evidences show that this shift is caused by as-grown mobile charges in $hboxAl_2hboxO_3$ layers generated by postdeposition annealing at 1000 $^circhboxC$ or above. Its impacts on program/erase windows and read/pass disturbance in Flash memory cells also are evaluated.
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