PROJECT TITLE :

Tunnel Field-Effect Transistors for Analog/Mixed-Signal System-on-Chip Applications

ABSTRACT:

In this paper, the analog performance is reported for the first time for a double-gate (DG) n-type tunnel field-effect transistor (n-TFET) with a relatively small body thickness (10 nm), which shows good drain current saturation. The device parameters for analog applications, such as transconductance $g_{m}$, transconductance-to-drive current ratio $g_{m}/I_{D}$, drain resistance $R_{O}$, intrinsic gain, and unity-gain cutoff frequency $f_{T}$, are studied for DG n-TFET, with the help of a device simulator, and compared with that for a similar DG n-MOSFET. Although $g_{m}$ is lower, $g_{m}/I_{D}$ is found to be higher in TFET, except for small values of the gate overdrive voltage, indicating that a TFET can produce higher gain at the same power level than a MOSFET. An extremely high $R_{O}$ and, hence, a high intrinsic gain are also observed for a TFET as compared with that for a MOSFET. A complementary TFET amplifier is found to have more than one order of magnitude higher voltage gain than its MOS counterpart. It is also demonstrated that the drain resistance and, hence, the device gain significantly degrade for increasing body thickness of a TFET.


Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here


PROJECT TITLE :Effects of IPv6-IPv4 tunnel in Jitter of Voice over IPv6, measured in laboratory and over the National Research and Education Network of Colombia “RENATA”ABSTRACT:This paper shows the results of a analysis process
PROJECT TITLE :Methods to Enhance the Performance of InGaAs/InP Heterojunction Tunnel FETsABSTRACT:This paper presents a simulation study of In0.53Ga0.47As/InP heterojunction gate-overlapped-source tunnel FETs (GoS-TFETs) with
PROJECT TITLE :Study of Random Variation in Germanium-Source Vertical Tunnel FETABSTRACT:An optimally designed germanium-source vertical tunnel FET (V-TFET) is investigated using technology computer aided style simulation. Three
PROJECT TITLE :III–V Tunnel FET Model With Closed-Form Analytical SolutionABSTRACT:Using an idealized semianalytical model of charge transport for InAs-primarily based tunneling FET, it is shown that the output and transfer
PROJECT TITLE :Design of magnetic tunnel junction-based tunable spin torque oscillator at nanoscale regimeABSTRACT:This study proposes a spintronic primarily based compact tunable nano-sized RF oscillator. The proposed style provides

Ready to Complete Your Academic MTech Project Work In Affordable Price ?

Project Enquiry