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Low On-Resistance Normally-Off GaN Double-Channel Metal–Oxide–Semiconductor High-Electron-Mobility Transistor

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PROJECT TITLE :

Low On-Resistance Normally-Off GaN Double-Channel Metal–Oxide–Semiconductor High-Electron-Mobility Transistor

ABSTRACT:

An occasional on-resistance normally-off GaN double-channel metal–oxide–semiconductor high-electron-mobility transistor (DC-MOS-HEMT) is proposed and demonstrated during this letter, that features a 1.5-nm AlN insertion layer (ISL) located half-dozen nm below the standard barrier/GaN interface, forming a second channel at the interface between the AlN-ISL and also the underlying GaN. With gate recess terminated at the higher channel, normally-off operation was obtained with of +0.five V at /mm or +one.four V from the linear extrapolation of the transfer curve. The lower heterojunction channel is separated from the etched surface in the gate region, thereby maintaining its high field-effect mobility with a peak worth of 1801 cm2/( ). The on-resistance is as little as six.9 for a DC-MOS-HEMT with , and the most drain current is 836 mA/mm. A high breakdown voltage (>70zero V) and a steep subthreshold swing of 72 mV/decade are obtained.


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Low On-Resistance Normally-Off GaN Double-Channel Metal–Oxide–Semiconductor High-Electron-Mobility Transistor - 4.8 out of 5 based on 90 votes

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