PROJECT TITLE :

Complete 3D-Reduced Surface Field Superjunction Lateral Double-Diffused MOSFET Breaking Silicon Limit

ABSTRACT:

A replacement superjunction lateral double-diffused MOS with the semi-insulating poly silicon (SIPOS SJ-LDMOS) has been proposed during this letter, for the first time, with the complete three-dimensional reduced surface field (3D-RESURF). The SIPOS SJ-LDMOS along the 3 dimensions are subject to the electrical field modulation, which achieves the entire 3D-RESURF impact. The simulated breakdown voltage (BV) for the unit length of the drift region is improved to nineteen.4 $mathrm V/ mu textm$ . The drift region with the high concentration compared with the standard LDMOS can be depleted fully in the OFF-state to obtain the high BV. Moreover, the majority carrier accumulation will be shaped to any decrease $R_mathrm scriptscriptstyle ON,textrm sp$ (specific on resistance) throughout the ON-state operation. 3 effects are combined to SIPOS SJ-LDMOS for the superjunction ideal, electric field modulation and the majority carrier accumulation by SIPOS. The tradeoff between the BV and $R_mathrm scriptscriptstyle ON,textrm sp$ has been improved to break through the silicon limit. The results show that the experimental $R_mathrm scriptscriptstyle ON,textrm sp$ of SIPOS SJ-LDMOS is eighteen $textmOmega cdot textrm cm^2$ with the tested BV of 376 V, that is less than that of 31.one $textmOmega cdot textrm cm^2$ for the $N$ -buffer SJ-LDMOS with the simulated BV of 287 V, and so much less than seventy one.8 $textmOmega cdot textrm cm^2$ for the traditional LDMOS with the simulated BV of 254 V for the same drift region length of twenty $mu textm$ .


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