PROJECT TITLE :

Impact of Source–Drain Series Resistance on Drain Current Mismatch in Advanced Fully Depleted SOI n-MOSFETs

ABSTRACT:

In this letter, we have a tendency to demonstrate the existence of the source-drain series resistance mismatch and its impact on drain current variability with regard to the opposite mismatch parameters. To this finish, we have a tendency to propose a brand new methodology for the drain current mismatch study primarily based on Y-function, enabling an explicit determination of the numerous variability sources in advanced totally depleted silicon on insulator (SOI) MOS devices.


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