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A Highly Scalable Single Poly-Silicon Embedded Electrically Erasable Programmable Read Only Memory With Tungsten Control Gate by Full CMOS Process

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PROJECT TITLE :

A Highly Scalable Single Poly-Silicon Embedded Electrically Erasable Programmable Read Only Memory With Tungsten Control Gate by Full CMOS Process

ABSTRACT:

A highly scalable single poly-silicon multiple time programmable erasable programmable browse solely memory (EEPROM) with tungsten metallic control gate (W-CG) manufactured by full $zero.thirteen~mu textm$ -CMOS method is successfully demonstrated in this letter. Since the coupling ratio of typical EEPROM cell is reduced with decreasing cell size, a smaller size in W-CG cell with a reduced spacing of CG to floating gate (FG) can acquire a higher coupling ratio and increase programming/erasing window owing to its novel lateral metal-insulator-poly coupling structure.


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A Highly Scalable Single Poly-Silicon Embedded Electrically Erasable Programmable Read Only Memory With Tungsten Control Gate by Full CMOS Process - 4.7 out of 5 based on 94 votes

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