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Nonvolatile Poly-Si TFT Charge-Trap Flash Memory With Engineered Tunnel Barrier

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ABSTRACT:

Tunnel-barrier-engineered thin-film transistor (TFT) memory (TBE-TFT memory) devices on glass substrates were fabricated using low-temperature processes. An amorphous silicon film on the glass substrate was crystallized using excimer laser annealing for system-on-panel applications. The engineered tunnel barrier of VARIOT type $(hbox{SiO}_{2}hbox{/Si}_{3}hbox{N}_{4}hbox{/SiO}_{2})$ with a high-$k$$hbox{HfO}_{2}$ charge-trapping layer and an $hbox{Al}_{2}hbox{O}_{3}$ blocking layer was applied to TBE-TFT memory devices in order to enhance the memory performance of TBE-TFT memory devices. As a result, the poly-Si TFT charge-trap Flash memory with an engineered tunnel barrier exhibited excellent memory characteristics, such as large memory window (9.5 V), long retention time, and endurance.


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Nonvolatile Poly-Si TFT Charge-Trap Flash Memory With Engineered Tunnel Barrier - 4.8 out of 5 based on 25 votes

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