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Floating-Body Diode—A Novel DRAM Device

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A novel $hbox{8}F^{2}$ DRAM cell is introduced, consisting of two gates controlling a low-doped silicon-on-insulator channel and opposite-polarity source and drain. Simulation with models calibrated to experimental floating-body cell data confirms virtual thyristor memory operation and demonstrates 85 $^{circ}hbox{C}$ retention time in excess of 10 ms in a scaled FinFET architecture. With unit cell area comparable to that of conventional DRAM, 1.6-V total operation range, 1-ns program time, and CMOS-compatible process, floating-body diode is a candidate for stand-alone or embedded memory applications at 15-nm node and beyond.

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Floating-Body Diode—A Novel DRAM Device - 4.6 out of 5 based on 54 votes

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