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InP/GaAsSb DHBTs Fabricated in a Low-Temperature Teflon Planarization Process

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PROJECT TITLE :

InP/GaAsSb DHBTs Fabricated in a Low-Temperature Teflon Planarization Process

ABSTRACT :

We demonstrate InP/GaAsSb/InP double heterojunction bipolar transistors (HBTs) fabricated in an exceedingly low-temperature planarization process based on a spin-on Teflon amorphous fluoropolymer interlevel dielectric with $varepsilon_rm r = hbox1.9$ and a coffee dissipation factor. Devices with zero.three-$muhboxm$-wide emitters show wonderful junction characteristics, cutoff frequencies $f_rm T = hbox362 hboxGHz$ and $f_rm MAX = hbox450 hboxGHz$, a peak current gain $beta = hbox28$, and a common–emitter breakdown voltage $BV_rm CEO = hbox5.1 hboxV$. Teflon is seen to be an advantageous various to common benzocyclobutene and polyimide planarization dielectrics. A aspect-by-facet comparison of devices fabricated in Teflon and airbridge processes shows nearly identical performances. The gift approach is equally applicable to GaAs- and GaInAs-based mostly HEMT and HBT technologies.


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InP/GaAsSb DHBTs Fabricated in a Low-Temperature Teflon Planarization Process - 4.9 out of 5 based on 15 votes

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