Investigating the Drain-Bias-Induced Degradation Behavior Under Light Illumination for InGaZnO Thin-Film Transistors


This letter investigates the impact of gate/drain bias stress in InGaZnO skinny-film transistors beneath light-weight illumination and in a darkened surroundings. Drain current–gate voltage ( $I_D$–$V_G$) as well as capacitance–voltage ($C$– $V$) transfer curves are measured to investigate the degradation behavior. The device characteristic exhibits a absolutely parallel shift once the gate/drain bias stress in the dark. On the opposite hand, the identical stress performed underneath light-weight illumination results in not only a negative shift but also a distortion of the $C$– $V$ curve in the off state. Such phenomenon can be attributed to hole-trapping-induced barrier lowering close to the drain side once illuminated bias stress.

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