Low-Frequency Noise in SONOS-TFT With a Trigate Nanowire Structure Under Program/Erase Operation


This letter investigates low-frequency noise (LFN) in polycrystalline silicon thin-film transistor (TFT) nonvolatile memory (NVM) below Fowler–Nordheim tunneling program/erase (P/E) operation. The NVM utilizes a silicon–oxide–nitride–oxide–silicon (SONOS)-sort structure with a trigate multiple nanowire (NW) channels. The difference in the sparkle noise $(hbox1/f)$ level between a multiple-channel NW device and a commonplace single-channel device became smaller after P/E cycling. The observation can be explained by the amount of grain-boundary traps introduced by higher electric field at the NW corner throughout the P/E cycle, subsequently increasing the LFN level in the multiple NW SONOS-TFT.

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