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Redistribution of Electrical Interconnections for Three-Dimensional Wafer-Level Packaging With Silicon Bumps

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PROJECT TITLE :

Redistribution of Electrical Interconnections for Three-Dimensional Wafer-Level Packaging With Silicon Bumps

ABSTRACT :

During this letter, an approach to the redistribution of electrical interconnections is investigated for potential application in 3D wafer-level packaging. A cap wafer with silicon bumps and electrical feedthroughs is bonded along with a tool wafer using wafer-level glass-frit bonding technology. Throughout the bonding process, the mechanical bond is performed by glass-frit bonding to form hermetic packaging. Simultaneously, the silicon bumps provide close contact for the electrical feedthroughs on the cap wafer and the metal pads on the device wafer, on that a gold–aluminum eutectic is made to attain electrical interconnections between the cap wafer and also the device wafer. Moreover, the silicon bumps provide a means to manage well the height of the bonding materials. This process not only realizes a wafer-level hermetic sealing however also achieves the redistribution of electrical interconnections. Application of this approach for a high performance MEMS resonator is demonstrated, that illustrates the feasibility of this process.


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Redistribution of Electrical Interconnections for Three-Dimensional Wafer-Level Packaging With Silicon Bumps - 4.9 out of 5 based on 71 votes

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