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Enhancing Hysteresis in Graphene Devices Using Dielectric Screening

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PROJECT TITLE :

Enhancing Hysteresis in Graphene Devices Using Dielectric Screening

ABSTRACT :

A method of increasing hysteresis in graphene devices with a dielectric coating is presented. By controlling the sweep direction of the gate bias, “high-conductance” and “low-conductance” states will be made by transitioning the device between dielectric screened and unscreened states, that is a fundamentally new approach to manufacturing hysteresis. Moderate carrier densities ($sim !hbox4 times hbox10^12 hboxcm^-2$) lead to field-driven injection of charge from the graphene channel into the underlying $hboxSiO_2$ substrate, modifying the scattering charged-impurity layout seen by the graphene, ultimately disrupting the steady-state screening method. A stable space-temperature conductance gap of nearly one order of magnitude is demonstrated.


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Enhancing Hysteresis in Graphene Devices Using Dielectric Screening - 4.8 out of 5 based on 90 votes

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