Effect of Annealing Temperature on -Based Thin-Film-Transistor Performance


$hboxTiO_x$ thin-film transistors (TFTs) are fabricated using $hboxSiO_2$ as gate dielectrics. The enhancement of the electric characteristics is observed after a postannealing processing including the reduction of the threshold voltage $V_rm th$, the increase in mobility $mu$, and therefore the on/off ratio. The impact of the postannealing temperature on both the $hboxTiO_x/hboxSiO_2$ interfacial bonding structure and therefore the $hboxTiO_x$ crystallinity is investigated. We tend to counsel that the interfacial modification at the $hboxTiO_x/hboxSiO_2$ interface contributes to the many reduction of $V_rm th$ thanks to the breaking of Si–O–Ti bonding. The improvement of the $hboxTiO_x$ crystallinity and interfacial structure leads to the rise in $mu$ and in the on/off ratio. The low-temperature annealing treatment at two hundred $^circhboxC$ is terribly effective to improve the $hboxTiO_x/hboxSiO_2$ interface structure.

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