Hole Mobilities of $hbox_hbox_$ Quantum-Well Transistor on SOI and Strained SOI


Hole mobilities of quantum-well p-MOSFETs on strained Si (sSi)/$ hbox{Si}_{0.5}hbox{Ge}_{0.5}$/strained SOI (sSOI) and $ hbox{Si/Si}_{0.5}hbox{Ge}_{0.5}/hbox{SOI}$ heterostructure substrates are investigated as a function of temperature. Ge interdiffusion during annealing in highly strained $ hbox{Si}_{0.5}hbox{Ge}_{0.5}$ on SOI is reduced by the growth of $hbox{Si}_{0.5}hbox{Ge}_{0.5}$ layer on biaxially tensely strained SOI. As a result, the $hbox{sSi/Si}_{0.5}hbox{Ge}_{0.5}/hbox{sSOI}$ transistors showed significantly higher hole mobilities than the $hbox{Si/Si}_{0.5} hbox{Ge}_{0.5}/hbox{SOI}$ device at low temperatures.

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