Digital VLSI Implementation of Piecewise-Affine Controllers Based on Lattice Approach


This paper presents a little, quick, low-power consumption solution for piecewise-affine (PWA) controllers. To attain this goal, a digital architecture for terribly-giant-scale integration (VLSI) circuits is proposed. The implementation relies on the best lattice type, which eliminates the purpose location downside of alternative PWA representations and is ready to produce continuous PWA controllers defined over generic partitions of the input domain. The architecture is parameterized in terms of number of inputs, outputs, signal resolution, and features of the controller to be generated. The look flows for field-programmable gate arrays and application-specific integrated circuits are detailed. Many application samples of specific model predictive controllers (like an adaptive cruise control and the management of a buck-boost dc-dc converter) are included to illustrate the performance of the VLSI answer obtained with the proposed lattice-primarily based design.

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