PROJECT TITLE :

Performance of Streaming SIMD Extensions Instructions for the FDTD Computation

ABSTRACT:

The use of vector-arithmetic logic units could be a promising approach to hurry up FDTD computations from the perspective of hardware acceleration. This paper studies how a streaming SIMD extensions (SSE) implementation will be effi ciently developed, and things where SSE is benefi cial for FDTD computations.


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