PROJECT TITLE:

Benchmarking of MoS2 FETs With Multigate Si-FET Options for 5 nm and Beyond

ABSTRACT:

In this paper, we benchmark the performance of monolayer and bilayer MoS2 FETs (MFETs) against numerous multigate (MuG) Si-FET choices, like FinFETs and lateral and vertical nanowire FETs, for a 5-nm node and beyond. We have a tendency to compare the performance metrics of all the device choices at the ring-oscillator (RO) level, accounting for not solely intrinsic and extrinsic parasitic components but also interconnects. Using the atomistic two-band ballistic quantum transport simulations, we tend to evaluate ON-current and intrinsic capacitances for MoS2-based mostly devices. Furthermore, we calibrate two-band model currents with a lot of subtle full-band diffusive simulations to get realistic performance metrics at the circuit level. We have a tendency to show that each the intrinsic and parasitic capacitances of one-gate MFET are lesser than those of a double-gate (DG) MFET, ensuing in thirteen% lesser energy consumption. A DG bilayer (DGBL) MFET shows the most effective performance among completely different MFETs. In comparison toMuG FETs, the DGBL MFET offers not solely lower energy consumption however additionally 35%–45% lower speed. In the tip, to satisfy the target performance, we evaluate the impact of the device current, contact resistance, and back-end-of-the-line load on the speed of RO with the DGBL MFET.


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