ABSTRACT:

(In,Ga)As/GaAs quantum wells (QWs) are successfully fabricated via a thermally induced structural transition from deposited amorphous material to epitaxial films, also known as solid-phase epitaxy (SPE). Although exact processes occurring during the epilayer formation are unknown, it is shown that the method allows the fabrication of high quality QWs with abrupt and symmetric composition profiles. As discussed here, the analysis of the chemical interface (composition profile) of the SPE-grown QWs, and its comparison with the element profiles of similar heterostructures grown by conventional molecular beam epitaxy (C-MBE) provides further insight into the SPE processes. In particular, we find that regardless of the fabrication method (SPE vs C-MBE), the smooth variation of the element concentration with the position across the interface is remarkably well described by a sigmoidal function. Such functional dependence is determined by fundamental processes occurring during the growth; thus suggesting that the basic mechanisms of interface formation are similar in SPE and C-MBE. Finally, the effect of self- and post-growth thermal annealing on SPE QWs is also discussed.


Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here


PROJECT TITLE :DC-DC MMC for HVDC Grid Interface of Utility-Scale Photovoltaic Conversion Systems - 2017ABSTRACT:This paper explores a utility-scale photovoltaic (PV) plant configuration primarily based on a dc-dc stage interfaced
PROJECT TITLE :DC-DC MMC for HVDC Grid Interface of Utility-Scale Photovoltaic Conversion Systems - 2017ABSTRACT:This paper explores a utility-scale photovoltaic (PV) plant configuration primarily based on a dc-dc stage interfaced
PROJECT TITLE :DC-DC MMC for HVDC Grid Interface of Utility-Scale Photovoltaic Conversion Systems - 2017ABSTRACT:This paper explores a utility-scale photovoltaic (PV) plant configuration based on a dc-dc stage interfaced on to
PROJECT TITLE :Improvement of Rough Interface Between Barrier/Seed Layer and Porous Ultralow k Film for 28nm Technological Node and BeyondABSTRACT:With crucial dimension of device scaled down to twenty-eight nm technological node
PROJECT TITLE :An Interface Between Abaqus and Simulink for High-Fidelity Simulations of Smart StructuresABSTRACT:This paper presents an interface between Abaqus and Simulink to enable the incorporation of feedback management

Ready to Complete Your Academic MTech Project Work In Affordable Price ?

Project Enquiry