A Low-Power Robust Easily Cascaded PentaMTJ-Based Combinational and Sequential Circuits - 2015 PROJECT TITLE: A Low-Power Robust Easily Cascaded PentaMTJ-Based Combinational and Sequential Circuits - 2015 ABSTRACT: Advanced computing systems embed spintronic devices to improve the leakage performance of conventional CMOS systems. High speed, low power, and infinite endurance are important properties of magnetic tunnel junction (MTJ), a spintronic device, which assures its use in memories and logic circuits. This paper presents a PentaMTJ-based logic gate, which provides easy cascading, self-referencing, less voltage headroom problem in precharge sense amplifier and low area overhead contrary to existing MTJ-based gates. PentaMTJ is used here because it provides guaranteed disturbance free reading and increased tolerance to process variations along with compatibility with CMOS process. The logic gate is validated by simulation at the 45-nm technology node using a VerilogA model of the PentaMTJ. Did you like this research project? To get this research project Guidelines, Training and Code... Click Here facebook twitter google+ linkedin stumble pinterest Low-Cost High-Performance VLSI Architecture for Montgomery Modular Multiplication - 2015 Ultralow-Energy Variation-Aware Design: Adder Architecture Study - 2015