On the Nonvolatile Performance of Flip-FlopSRAM Cells With a Single MTJ - 2015
In this brief, 3 nonvolatile flip-flop (FF)/SRAM cells that utilize a single magnetic tunneling junction (MTJ) as nonvolatile resistive part are proposed. These cells have the same core (i.e., 6T) however they employ completely different numbers of MOSFETs to implement the thus-referred to as instantly ON, normally OFF mode of operation. The additional transistors are used for the restore operation to ensure that the information stored in the nonvolatile circuitry can be written back to the FF core once the power is created available. These 3 cells (7T, 9T, and 11T) are extensively analyzed in terms of their operations in 32 nm technology, such as operational delays (for the write, read, and restore operations), the static noise margin (SNM), essential charge and method variations (in each the MOSFETs and therefore the resistive element). Simulation results show that a rise in the amount of MOSFETs within the cells causes improvements in important charge and tolerance to method variations at the expense of an increase in power dissipation. The SNM and therefore the delay of the restore operation, however, do not essentially increase with the quantity of MOSFETs within the cell, however rather on the control of access to the storage nodes from the single MTJ.
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